1. Field of the Invention
The present invention relates to a velocity modulation transistor, especially to a velocity modulation transistor utilizing double quantum well structure.
2. Description of Related Art
A heterojunction transistor, wherein a semiconductor having a narrow band gap close to a hetero-interface is made to be a channel, the hetero-interface being formed by joining a semiconductor having a broad band gap as an electron supply layer and the semiconductor having a narrow band gap in which electrons can move at high speed, performs switching by adjusting the concentration of electrons flowing through the channel. Accordingly, the time required for charging/discharging electrons decides the operational speed of the heterojunction transistor. In order to overcome such a limitation of the operational speed, a heterojunction transistor which performs switching by modulating the speed of electrons has been proposed (H. Sakaki; Jpn. J. Appl. Phys. Vol. 21, No. 6, June 1982 pp. L381-L383).
This heterojunction transistor, called a velocity modulation transistor (hereinafter to be called VMT), comprises two heterojunctions formed between two channel layers differing in impurity concentration from each other and two gate electrodes sandwiching the two heterojunctions therebetween. By changing bias voltages of these gate electrodes, characteristics of the channel layers through which carriers flow can be changed. A change of channel conductance (.DELTA.G) to a change of bias voltage (.DELTA.V) is obtained according to the following equation (1). EQU .DELTA.G=q.multidot..mu.eff.multidot..DELTA.N+q.multidot.N.multidot..DELTA. .mu.eff (1)
q: electric charge of carrier PA0 .mu.eff: carrier mobility PA0 .DELTA.N: a change of carrier concentration PA0 N: carrier concentration PA0 .DELTA..mu.eff: a change of carrier mobility
In such a velocity modulation transistor, two gate electrodes are necessary, and moreover, one of them must be provided inside the velocity modulation transistor.
A velocity modulation transistor capable of operating in the same way as the above-mentioned having only one gate electrode has been proposed (Okuno, et al.; Extended Abstracts (The 50th Autumn Meeting 1989), The Japan Society of Applied Physics).
FIG. 1 is a schematic sectional view of such a velocity modulation transistor comprising one gate electrode. In the figure, reference numeral 41 designates a semi-insulative GaAs substrate. On the GaAs substrate 41, a GaAs layer 42, an n-type AlGaAs layer 43, a GaAs layer 44, an AlGaAs layer 45, an n-type GaAs layer 46 and an n-type AlGaAs layer 47 are laminated in this order. On the peripheral portion of the AlGaAs layer 47, an n-type GaAs layer 48 is formed, a source electrode 50 and a drain electrode 51 being formed on the GaAs layer 48. On the central portion of the AlGaAs layer 47 on which the GaAs layer 48 is not formed, a gate electrode 49 is formed. In addition, the GaAs layer 44 is thicker than the GaAs layer 46.
The velocity modulation transistor is so constructed that two kinds of channel layers (GaAs layers 44, 46) may be separated from each other by the barrier layer (AlGaAs layer 45). In the state where bias voltage is not applied to the gate electrode 49, as the lowest quantum level (first level) in the GaAs layer 46 is higher than the lowest quantum level (second level) in the GaAs layer 44, electrons of lowest quantum level in the transistor exist only in the channel layer (GaAs layer 44) having a broad well width (film thickness). Electrons of the second lowest quantum level in the transistor exist only in the channel layer (GaAs layer 46) having a narrow well width. In addition, in this velocity modulation transistor, as Si is doped in only the GaAs layer 46, electron mobility in the channel layer (GaAs layer 46) having the narrow well width is lower than that in the channel layer (GaAs layer 44) having the broad well width.
Therefore, by changing the channel through which electrons flow from the channel layer (GaAs layer 44) of high electron mobility to the channel layer (GaAs layer 46) of low election mobility according to the application of bias voltage to the gate electrode 49, switching can be performed. That is, by utilizing this method, whereby the first level becomes lower than the second level according to the application of bias voltage to the gate electrode 49, switching can be performed.
Since both channel layers in above-mentioned velocity modulation transistor are GaAs layers, band gaps of the two channel layers are same. Therefore, the film thickness of each GaAs layer is appropriately controlled in order to make the first level higher than the second level in the state where bias voltage is not applied to the gate electrode 49. But there is a limitation of energy difference between the first level and the second level obtained by the control of the film thickness. In this way, in above-mentioned velocity modulation transistor, as the energy difference between the first level and second level is as small as about 0.1 eV, a problem exists in that there is a high probability of existence of electrons in the two channel layers, thereby reducing the velocity modulation effect for operation state at room temperature.